From 50cc9733695a5cca77055c0db6031fae18011ced Mon Sep 17 00:00:00 2001 From: Celeste Liu Date: Tue, 1 Nov 2022 18:33:55 +0800 Subject: [PATCH] maintain: update u-boot to v2022.10 & opensbi to v1.1 Signed-off-by: Celeste Liu --- ...cv-fix-compitible-with-binutils-2.38.patch | 48 -------- ...fix-bug-of-virtio_pci_map_capability.patch | 115 ------------------ mkimg | 11 +- 3 files changed, 4 insertions(+), 170 deletions(-) delete mode 100644 0001-riscv-fix-compitible-with-binutils-2.38.patch delete mode 100644 0002-virtio-pci-fix-bug-of-virtio_pci_map_capability.patch diff --git a/0001-riscv-fix-compitible-with-binutils-2.38.patch b/0001-riscv-fix-compitible-with-binutils-2.38.patch deleted file mode 100644 index d7e6620..0000000 --- a/0001-riscv-fix-compitible-with-binutils-2.38.patch +++ /dev/null @@ -1,48 +0,0 @@ -From 3738b1f05101506d8221d1d0baffe93f1bfc2a91 Mon Sep 17 00:00:00 2001 -From: Coelacanthus -Date: Mon, 23 May 2022 15:35:00 +0800 -Subject: [PATCH] riscv: fix compitible with binutils 2.38 - -commit 6df2a016c0c8a3d0933ef33dd192ea6606b115e3 from linux kernel - -Since binutils 2.38, default ISA spec version switch to 20191213, -in this version, original I extension be split into I, Zicsr and Zifencei. -Zicsr is csr read/write (csrr*/csrw*) instructions, and Zifencei -is fence.i instruction. -This will cause compile error like this: - Error: unrecognized opcode `csrr a5,0xc01' - Error: unrecognized opcode `fence.i' - -This commit add code to detect new Zicsr and Zifencei extensions, -and enable it when needed. - -Signed-off-by: Coelacanthus -Cc: Rick Chen -Cc: Leo ---- - arch/riscv/Makefile | 9 ++++++++- - 1 file changed, 8 insertions(+), 1 deletion(-) - -diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile -index 0b80eb8d86..62712f8d38 100644 ---- a/arch/riscv/Makefile -+++ b/arch/riscv/Makefile -@@ -24,7 +24,14 @@ ifeq ($(CONFIG_CMODEL_MEDANY),y) - CMODEL = medany - endif - --ARCH_FLAGS = -march=$(ARCH_BASE)$(ARCH_A)$(ARCH_C) -mabi=$(ABI) \ -+RISCV_MARCH_y = $(ARCH_BASE)$(ARCH_A)$(ARCH_C) -+ -+# Newer binutils versions default to ISA spec version 20191213 which moves some -+# instructions from the I extension to the Zicsr and Zifencei extensions. -+toolchain-need-zicsr-zifencei := $(call cc-option-yn, -mabi=$(ABI) -march=$(RISCV_MARCH_y)_zicsr_zifencei) -+RISCV_MARCH_$(toolchain-need-zicsr-zifencei) := $(RISCV_MARCH_y)_zicsr_zifencei -+ -+ARCH_FLAGS = -march=$(RISCV_MARCH_y) -mabi=$(ABI) \ - -mcmodel=$(CMODEL) - - PLATFORM_CPPFLAGS += $(ARCH_FLAGS) --- -2.36.1 - diff --git a/0002-virtio-pci-fix-bug-of-virtio_pci_map_capability.patch b/0002-virtio-pci-fix-bug-of-virtio_pci_map_capability.patch deleted file mode 100644 index 9e83965..0000000 --- a/0002-virtio-pci-fix-bug-of-virtio_pci_map_capability.patch +++ /dev/null @@ -1,115 +0,0 @@ -From patchwork Sun Aug 28 23:53:15 2022 -Content-Type: text/plain; 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- dmarc=pass (p=none dis=none) header.from=126.com -Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=wxjstz@126.com -DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=126.com; - s=s110527; h=From:Subject:Date:Message-Id:MIME-Version; bh=RIn71 - S7di+V57wl9VfegrOtPn+A9JhVRoWCZ8oWkP00=; b=VGdtnUqgaONAruptVhAca - kbcG5tRTQ2J/Kq18DjOr6okLeeuc/hnxDBQ5Y+osBWmfdIj+v//SYY5ggtevQZBz - 2wrWswjrG+c8F4rTAPJQcZ6oCAvJ977Ex+aYGooF/EIQTIZHgctRCLADHZRFoKkk - 6HGNOCVAEDbZ3QOo8mEcO0= -Received: from x390.lan (unknown [210.22.74.224]) - by smtp9 (Coremail) with SMTP id NeRpCgBnbt4HAAxjlZxvAQ--.27568S2; - Mon, 29 Aug 2022 07:53:44 +0800 (CST) -From: Xiang W -To: u-boot@lists.denx.de -Cc: Xiang W , - Felix Yan -Subject: [PATCH] virtio: pci: fix bug of virtio_pci_map_capability -Date: Mon, 29 Aug 2022 07:53:15 +0800 -Message-Id: <20220828235315.332024-1-wxjstz@126.com> -X-Mailer: git-send-email 2.30.2 -MIME-Version: 1.0 -X-CM-TRANSID: NeRpCgBnbt4HAAxjlZxvAQ--.27568S2 -X-Coremail-Antispam: 1Uf129KBjvdXoWrKF1fJF45JFWUWFyUGryUWrg_yoWkXFc_Cr - s3urWvgry5tF4F93yUZ3WfXr9akas8uanY9F15JryrAwsrAFn8Zr1fZF1qv3Wfur45Cr47 - Ja15W3s5Zwn3ujkaLaAFLSUrUUUUUb8apTn2vfkv8UJUUUU8Yxn0WfASr-VFAUDa7-sFnT - 9fnUUvcSsGvfC2KfnxnUUI43ZEXa7xR9miEtUUUUU== -X-Originating-IP: [210.22.74.224] -X-CM-SenderInfo: pz0m23b26rjloofrz/1tbi2QlrOlpEE+1MtQAAsY -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.39 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de -X-Virus-Status: Clean - -The bar of the structure virtio_pci_cap is the index, and each base -address occupies 4 bytes, so it needs to be multiplied by 4. - -This patch fixes a bug reported by Felix Yan -https://lists.denx.de/pipermail/u-boot/2022-August/492779.html - -Signed-off-by: Xiang W -Tested-by: Felix Yan ---- - drivers/virtio/virtio_pci_modern.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/virtio/virtio_pci_modern.c b/drivers/virtio/virtio_pci_modern.c -index 880a12cc28..cfde4007f5 100644 ---- a/drivers/virtio/virtio_pci_modern.c -+++ b/drivers/virtio/virtio_pci_modern.c -@@ -466,7 +466,7 @@ static void __iomem *virtio_pci_map_capability(struct udevice *udev, - unsigned long mask = - PCI_REGION_TYPE | PCI_REGION_SYS_MEMORY | PCI_REGION_RO; - unsigned long flags = PCI_REGION_MEM; -- u8 *p = dm_pci_map_bar(udev, PCI_BASE_ADDRESS_0 + cap->bar, cap->offset, -+ u8 *p = dm_pci_map_bar(udev, PCI_BASE_ADDRESS_0 + 4 * cap->bar, cap->offset, - cap->length, mask, flags); - - return (void __iomem *)p; diff --git a/mkimg b/mkimg index 16bb0d4..df28284 100755 --- a/mkimg +++ b/mkimg @@ -85,11 +85,10 @@ pushd u-boot git checkout master git checkout master -- ':(top)' git pull --rebase -git checkout v2022.07 +git checkout v2022.10 msg2 "Apply binutils 2.38 compitible patch" -git apply ../0001-riscv-fix-compitible-with-binutils-2.38.patch -msg2 "Apply 'virtio: pci: fix bug of virtio_pci_map_capability' patch" -git apply ../0002-virtio-pci-fix-bug-of-virtio_pci_map_capability.patch +git cherry-pick -n 1dde977518f13824b847e23275001191139bc384 + make \ CROSS_COMPILE=riscv64-linux-gnu- \ qemu-riscv64_smode_defconfig @@ -103,9 +102,7 @@ pushd opensbi git checkout master git checkout master -- ':(top)' git pull --rebase -git checkout v1.0 -msg2 "Apply binutils 2.38 compitible patch" -git cherry-pick -n 5d53b55aa77ffeefd4012445dfa6ad3535e1ff2c +git checkout v1.1 make \ CROSS_COMPILE=riscv64-linux-gnu- \